FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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PCIE Gen1 and Gen2 negotiation

Altera_Forum
Honored Contributor II
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I've got a board, that sometimes powers up with the BIOS recognising 4 lanes at Gen 2 and sometimes the BIOS only recognises 4 lanes at Gen 1. I'm using a Cyclone 5 CST part, and the hard IP controller with Avalon ST. Is there any reason why I'm not consistently getting Gen 2? 

 

Cheers, 

Simon
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Altera_Forum
Honored Contributor II
258 Views

Probably some signal integrity issue causing the Gen2 data rate to fail during negotiation.

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Altera_Forum
Honored Contributor II
258 Views

I've encountered this problem at my previous workplace repeatedly. 

For a starter, take a closer look at your AC coupling capacitors, to see if any are either damaged or missing (for a 4x PCIe you should have 8 of those). 

Another failure may arise from a damaged connector - the connector must be clean without any signs of scratches. 

 

Report back when you have a chance, 

Refael.
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Altera_Forum
Honored Contributor II
258 Views

Agree with Refael, the connection issue might lead to signal degrade as well.

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