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PCIe. How to get BAR address from PCI device.

Altera_Forum
Honored Contributor II
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Hello.  

 

I need absolute address (from BAR) in my device. So, I need a BAR address. I can read this address from PCI config throw lmi bus, and it's worked. But I can't find any signal that BARs is set. Also I'm find that from time from lmi_rden to lmi_ack take a 16 clocks. Why so long? Can I decrease performance PCIe if I will continuously read BAR register?  

 

Thank. Sorry for bad English.
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Altera_Forum
Honored Contributor II
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Any BAR is aligned to its natural size. That means in your application, once you have a BAR indication from the PCIe IP you only need to decode the relevant lower significant bits of the address. 

 

For example, consider you have configured your IP to claim a BAR of size 1 MiB. When your PCI device is configured by system software (i.e. operating system and driver), a request to an address in the granted address window will send the request to your IP. In that case you only have to decode the 20 LSBs of the TLP address to know the offset within the granted BAR range. 

 

I see no need to lookup lmi_* together with a full-scale address decoder for the actual assigned physical BAR address if you have BAR indication from the PCIe IP block.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Any BAR is aligned to its natural size. That means in your application, once you have a BAR indication from the PCIe IP you only need to decode the relevant lower significant bits of the address. 

 

For example, consider you have configured your IP to claim a BAR of size 1 MiB. When your PCI device is configured by system software (i.e. operating system and driver), a request to an address in the granted address window will send the request to your IP. In that case you only have to decode the 20 LSBs of the TLP address to know the offset within the granted BAR range. 

 

I see no need to lookup lmi_* together with a full-scale address decoder for the actual assigned physical BAR address if you have BAR indication from the PCIe IP block. 

--- Quote End ---  

 

 

A big THANK!
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