PCIe MSI Interrupt

[Altera_Forum]

HI, 

I have Cyclone V/GT with Gen2 4 lane DMA example design. The FPGA card is plugged into PC running Windows 7. I wrote a windows driver. It seems that the MSI interrupt is not received. After the driver installation, the FPGA card enters in D0 power state, Interrupt enable is called, MSI enabled, Legacy Interrupt is disabled, why interrupt ISR is not triggered? Is there any thing need to done? I expect the FPGA sends data automatically.   Thank you,  Tiger.

[Altera_Forum]

To enable MSI interrupts, ensure the CRA port is enabled, host side needs to set the MSI enable bit and Interrupt Disable bit. 

1. Set MSI Enable of MSI Control register, this bit is mapped to bit[16] of offset 0x50 in configuration space register. 2. Set Interrupt Disable bit[10] of Command register at configuration space offset register 0x4 to disable legacy interrupt. 3. Set bit[1] (Memory space) and bit[2] (Bus Master) of Command Register at configuration space offset register 0x4 to enable the ability to  generate MSI message.   Once users trigger the rxm_irq, the PCIe core will generates the interrupt message.

[Altera_Forum]

Hi Tiger 

 For your information, the MSI interrupt message is the same as regular memory write TLP, the only difference would the address. One things need to clarify with you, do you have problem to do any other memory write to the host, besides the MSI-X message?

[Altera_Forum]

Do you have to following in you .inf file for the driver? 

  HKR,,MSICapability, 0x00010001, 0x00400000 HKR,,MSINeeded, 0x00010001, 0x04 HKR,,EnableMSIInterrupts, 0x00010001, 0x01 HKR,Interrupt Management, 0x00000010 HKR,Interrupt Management\MessageSignaledInterruptProperties, 0x00000010 HKR,Interrupt Management\MessageSignaledInterruptProperties,MSISupported, 0x00010001, 1 HKR,Interrupt Management\MessageSignaledInterruptProperties,MessageNumberLimit, 0x00010001, 8   Without those registry entries, MSI interrupts will not be enabled.

[Altera_Forum]

I have the above code in the .inf.  

I got PCIe with DMA interface MSI working. Thank you,

[Altera_Forum]

did anyone have ever use the fpga to send the msi interrupt,why i read the Message Upper Address，Message Lower Address,Message Data register at first,they are all 0,and then i configure these register in the isr enable callback function,i configure Upper Address register to be FEE00008，Message Data egister to be00000001.and i ask if the MessageID is 1 in the isr callback function,but it seems that the MSI interrupt is not received.why?