In some cases when testing a PCIe design, the device loses its bitstream randomly and causes the PC to have a fatal crash. I'm using signal tap so when the design loses its bitstream I lose the ability to see what's going on. I cant see the problem in hardware due to this. Does anybody have any clue as to what could be causing this?
Does anybody know anything about this issue? Everytime I try to read over a certain threshold of data, the FPGA loses the PCIe design bit stream and it causes the kernel to crash. There is no way I can debug the hardware and its causing a roadblock for me.
The FPGA is unlikely to lose the bitstream when performing the PCIe test. There must be a dependency on the test that you performed on the PCIe traffic, please explain the difference if possible. It probably is due to your driver performed some incorrect test, or your application logic at the endpoint does not respond to the request correctly.
If further support is needed in this thread, please post a response within 15 days. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.