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PCIe and Nios in SOPC builder

Altera_Forum
Honored Contributor II
1,095 Views

Hallo all,  

 

I'm trying to build a system with two DMAs PCIe compiler and Nios as a DMAs controller. I'm reading DMA descriptor from host (using the Tx PCIe interface) config the DMA Rx and DMA TX the configuration seems to be o.k. (the length of the transaction writing well to the length register). The problem that the DMA operate just partial transaction and stuck. I really will be happy to get a help! As any one pace this problem or have any advice?
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Altera_Forum
Honored Contributor II
275 Views

are you using the SGDMA? or the standard DMA? 

 

--dalon
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Altera_Forum
Honored Contributor II
275 Views

Hi, 

 

I'm using the standard DMA. 

 

Tal.
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Altera_Forum
Honored Contributor II
275 Views

make sure bursting is off and you don;t have unaligned transfers on.  

 

--dalon
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Altera_Forum
Honored Contributor II
275 Views

The transfer with burst on has to work too. I'm using DMA Controller and PCIEx Core, and i had problem with length transfer multiple of less 8 bytes.

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Altera_Forum
Honored Contributor II
275 Views

I successes now to transfer burst. 

But because my host is 64bit and the avalon is 32bit, I needed to connect read and write to tx_interface at the PCIe core(I added unnecessary arbitration on both interface!) 

That the only way it's work - did you handle anything similar? Thanks.
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Altera_Forum
Honored Contributor II
275 Views

Yes, you needs to connect read and write interfaces of dma controller to tx_interface.

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Altera_Forum
Honored Contributor II
275 Views

and why is it so? 

is it write any where? or did you figure it out alone?
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