Hallo all,I'm trying to build a system with two DMAs PCIe compiler and Nios as a DMAs controller. I'm reading DMA descriptor from host (using the Tx PCIe interface) config the DMA Rx and DMA TX the configuration seems to be o.k. (the length of the transaction writing well to the length register). The problem that the DMA operate just partial transaction and stuck. I really will be happy to get a help! As any one pace this problem or have any advice?
I successes now to transfer burst.But because my host is 64bit and the avalon is 32bit, I needed to connect read and write to tx_interface at the PCIe core(I added unnecessary arbitration on both interface!) That the only way it's work - did you handle anything similar? Thanks.