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Problem with the block 'Avalon-MM Write FIFO' in DSP Builder

Altera_Forum
Honored Contributor II
‎11-09-2010 11:58 AM
1,122 Views

Hi. 

 

I've built a model in Simulink with the block 'Avalon-MM Write FIFO' to test it. 

https://www.alteraforum.com/forum/attachment.php?attachmentid=3253  

I do the input 'simin' with the next code: 

a = [25 32 8 1 212 246 0 19]; 

t=1:8; 

simin.signals.values = a'; 

simin.time=t; 

 

But when I simulate the model, the first valid value (when the signal DataValid is activated) is 18, not 25. The next valid data is 25 and go on rigth. In the end, the last valid value must be 19, but the signal DataValid is still on and DataOut has wrong values (38, 57, 76, 95,... it adds the last 19 in each cycle).  

 

Why does this happen?
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