FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6663 Discussions

QPP22.2 Intel Arria 10/Cyclone 10 Hard IP for PCI Express, with SR-IOV enabled, fails system boot

Daphn
Employé
673 Visites

Hi there,

 

The same design works well using QPP 19.1.

 

Thanks in advance.

 

Regards,

Daphn

 

 

0 Compliments
2 Réponses
Wincent_Altera
Employé
644 Visites

Hi,


Thanks for reaching, may I know how the design fail ?

Is there any printscreen error that you convenience to provide ?

Also, If possible please share with me the .qar file of both fail with us.

So that I can check on it.


Regards,

Wincent_Intel


0 Compliments
Wincent_Altera
Employé
622 Visites

Hi,


Private conversation had been made due to level of confidential of customer.

Hence, This thread will be transitioned to community support.

If you have a new question, feel free to open a new thread to get support from Intel experts.


If you feel your support experience was less than a 9 or 10,

please allow me to correct it before closing or let me know the cause so that I may improve your future support experience.

 

Regards,

Wincent_Intel



0 Compliments
Répondre