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QSYS SPI not parametrized ?

Altera_Forum
Honored Contributor II
964 Views

Hello, 

 

I am trying to test my own SPI (master) BFM so I used QSYS o create a simple design: SPI_BRIDGE and one ONCHP RAM. My question is: 

How can I find out the parameter of the SPI_BRIDGE ? Is it 32bit address and 32bit data? i.e. do I send it one clock for W/R 

followed by 32 clocks for address and 32 clocks for data? The SPI_BRIDGE is the only Avalon master, no NIOS. How can I set its parameters? 

 

Thanks, 

S.
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3 Replies
Altera_Forum
Honored Contributor II
96 Views

I don't have any answers for you, as I ran into some similar questions/uncertainties with some of the SPI stuff. 

 

When it came to implementing a slave device, I ended up using the spi slave to avalon MM master found on the alterawiki site. I customized it for word/address size and simulated it so I understood how it worked. It seemed like a better starting point for me since there was some documentation. There must be a better way to use the altera SPI stuff but it wasn't obvious to me. 

 

Hopefully you will get a more helpful response as I would like to know more as well. 

 

Lance
Altera_Forum
Honored Contributor II
96 Views

 

--- Quote Start ---  

I don't have any answers for you, as I ran into some similar questions/uncertainties with some of the SPI stuff. 

 

When it came to implementing a slave device, I ended up using the spi slave to avalon MM master found on the alterawiki site. I customized it for word/address size and simulated it so I understood how it worked. It seemed like a better starting point for me since there was some documentation. There must be a better way to use the altera SPI stuff but it wasn't obvious to me. 

 

Hopefully you will get a more helpful response as I would like to know more as well. 

 

Lance 

--- Quote End ---  

 

 

Hi Lance, 

 

I sort of cleared the mystery a bit when found the spec. for the spi_bridge_MM. The spec's link is broken... but if you google it you see how screwy it is to use. 

Anyway, I used a external-master-bridge with an external slave SPI, instead. 

 

Cheers, 

S.
Altera_Forum
Honored Contributor II
96 Views

Shvitzer, 

 

Thanks! -- screwy indeed. 

 

I downloaded the spi bridge design example. At least it *seems* complete.  

 

Lance
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