FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5886 Discussions

Questions about using Remote Update IP core

RobertLiang
New Contributor I
156 Views

Hello, I'm using Remote Update IP core in my design. The device is cyclone 10LP, and the configuration device is EPCQ64A. 
I set the boot address of the application image as 0x400_000 which is half of the address space of the flash device.

But when I was debugging my design, I found that, although the application image was loaded on the FPGA, the value of the boot address of this image I read was wrong.

I wonder if there's any detail I ignored? The parameters I set were as follows.

RobertLiang_1-1620377111510.png

RobertLiang_0-1620377092446.png

And the value I read is 0x1_000_000 which is wrong.

RobertLiang_0-1620377258369.png

 

Thank you!

 

0 Kudos
1 Solution
NurAiman_M_Intel
Employee
112 Views

Hi,


Thank you for contacting Intel community.


Apologize for the delay in response as this case was only routed to me today.


  1. I am assuming you have follow this design example, but having problem with the boot address?

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_altremote.pdf



2.Please let me know if my understanding is correct or not. If you are following the design example, do you check on the design example?

https://fpgacloud.intel.com/devstore/platform/17.0.0/Standard/cyclone-10-lp-remote-system-update-des...


Regards,

Aiman



View solution in original post

2 Replies
NurAiman_M_Intel
Employee
113 Views

Hi,


Thank you for contacting Intel community.


Apologize for the delay in response as this case was only routed to me today.


  1. I am assuming you have follow this design example, but having problem with the boot address?

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_altremote.pdf



2.Please let me know if my understanding is correct or not. If you are following the design example, do you check on the design example?

https://fpgacloud.intel.com/devstore/platform/17.0.0/Standard/cyclone-10-lp-remote-system-update-des...


Regards,

Aiman



NurAiman_M_Intel
Employee
98 Views

Hi,


Any update fort this request? Else, I will proceed to close this case.


Thanks.


Regards,

Aiman


Reply