S10 PCIE fail to create design example

[ASiu0]

Hi All,

System configure:

OS: Win10

QII: 19.3

FPGA: 1SG280HH1F55I1VG

DOC: UG20032, UG20053, UG20170 , AN811

Question:

I follow the "Create the design example" section of those UG but fail to create a design example. It report error when I press "Generate Example Design" in Platform Designer. Please provide some advice for fix the issue.

Information attached:

Qsys file

Copy of error message

Log file

Thx

Albert

[SengKok_L_Intel]

Hi,

In order to better assist you, could you please share with us the PCIe *.ip file, so that I can get the exact same setting as yours and try to generate the example design. Thanks.

Regards -SK

[ASiu0]

Dear SK,

As attached.

Thx.

Albert,

[SengKok_L_Intel]

Hi,

I don't observe the same error, the example design is able to generate in my system. Could you please refer to the attachment for the example design that you are looking for and see if this work for you?

Regards -SK

[SengKok_L_Intel]

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