I am following this user guide
https://www.intel.com/content/www/us/en/programmable/documentation/hdr1553631507036.html ; and at section 2.2 step 13 Quartus prime pro 20.1 version fails to generate example design . The error it points to is ---
Error starting the process ([C:/intelfpga_pro/20.1/quartus/sopc_builder/bin/qsys-script, --pro, --script=C:/WINDOWS/TEMP/alt8401_445913643095085809.dir/0001_intel_pcie_ptile_ast_0_gen/pcie_ed.tcl]): Cannot run program "C:\intelfpga_pro\20.1\quartus\sopc_builder\bin\qsys-script" (in directory "C:\Windows\Temp\0001_intel_pcie_ptile_ast_0_gen"): CreateProcess error=267, The directory name is invalid.
can you help me move past this error so i can test out this example design?
I also tried with Quartus Prime Pro version 19.3 and got same error
In order to better assist you, could you please share with us the PCIe *.ip file, so that I can get the exact same setting as yours and try to generate the example design. Thanks.
Hi, I am unable to attache the file here; but steps are easy to reproduce.
- open quartus prime pro 20.1 in widows 10.
- start new project and select 1SD280PT2F55E2VGS1 device.
- From IP catalog choose Intel P-tile avalon-ST for PCI express.
- once platform designer opens IP configuration GUI; In example design tab, choose Stratix 10 DX Ptile development kit. (keep all settings to default and ) click on Generate HDL.
- Once Generate HDL is finished successfully; click on generate example design.
- this is where it fails.
For your information, I have also tried to generate the example design in window 10 with Quartus version 20.1, and the example design is able to generate successfully.
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