FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6663 ディスカッション

Stratix 10 L tile Soft Bonding Implementation

HBhat2
新規コントリビューター II
657件の閲覧回数

Hi,

I am using L-tile Stratix 10 Platform for my development. My requirement is 20.625Gbps x2 mode. Unfortunately Channel Bonding is not supported for GXT data rate mode. So, I was thinking to use Soft Bonding technique mentioned in the L-tile transceiver user guide. Now I came to know that, to implement that Soft Bonding feature, it is required to set PCS-Core FIFO in Interlaken mode, but again, Interlaken is not supported for GXT mode. In that case, we need to use Enhanced PCS mode itself.

 

I want to know, is there any guidelines to implement soft bonding feature for Enhanced PCS mode?

 

With regards,

HPB

0 件の賞賛
1 返信
CheePin_C_Intel
従業員
438件の閲覧回数

Hi,

 

As I understand it, you have some inquiries related to soft bonding for Enh PCS. Sorry as I am not aware of any specific guidelines on soft bonding for Enh PCS. Sorry for the inconvenience. You might need to refer to the "TX Soft Bonding Flow" in the user guide to see if they are helpful for you to code the soft bonding in your design.

 

Thank you.

返信