Community
cancel
Showing results for 
Search instead for 
Did you mean: 
agula
New Contributor I
27 Views

Stratix 10 PCIe ST IP configuration errors

Hello,

I am trying to implement a PCIe design on the Stratix 10 board but the bitstream stops at 71 % and give me an error saying the device is in configuration mode. I made sure that I am using the intel release IP and have connected it appropriately to the PCIe HIP through the ninit_done signal. The board is connected to the root complex of a PC when I try to program the device.

Thank you!

0 Kudos
0 Replies
Reply