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Stratix 10 SX simulation fails with ERROR: iossm_bf_cpu_cpu_test_bench/i_read is 'x'


I am running a top-level simulation for my design which includes the HPS EMIF IP. I am not exercising this module in this simulation, I just want it to not abort my simulation at approx 120 us simulation time.


120975 ns: ERROR: iossm_bf_cpu_cpu_test_bench/i_read is 'x' # ** Note: $stop : /intelFPGA_pro/19.1/quartus/eda/sim_lib/mentor/fourteennm_atoms_ncrypt.sv(36) # Time: 120975250 ps Iteration: 1 Protected: /xxx/xxx/xxx/emif_hps/altera_emif_s10_hps_inst/arch/arch_inst/io_ssm_inst/io_ssm/inst/<protected>/<protected>/<protected>/<protected>

I am using Questasim 2019.2 and Quartus Prime Pro 19.1, though the versions of either tool have not seemed to matter regarding this behavior.


I have seen this knowledgebase entry but it does not include a workaround. The EMIF IP is deep in a Platform Designer module and I don't know how to conveniently remove it for simulation vs. synthesis. How best to avoid this error?

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I apologize for the delay in response.

The KDB is to mentioned that the S10 HPS EMIF Simulation is not supported.

To answer you question, to avoid this is try adding the memory model which is generated in fabric EMIF into your simulation. Please note that vendor specific model is not supported.

Thus, the suggestion would be using fabric EMIF instead of HPS EMIF for simulation.


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