Hello,i created a megafunction with the wizard for using the ddr2 memory on my stratix IV-board. But there seems to be a problem in the pin assignment. while place&route i get the following error: Error: Can't place M1_DDR2_dm with OCT calibration block ddrRAM:mem_if|ddrRAM_controller_phy:controller_phy_inst|ddrRAM_memphy_top:memphy_top_inst|ddrRAM_oct_control:uoct_control|sd1a_0 in I/O Bank 3A because it already has pins driven by OCT calibration block termination_blk0 [...] here is an excerpt of my pin-assignment file: ----------------- set_location_assignment PIN_AF25 -to termination_blk0~_rup_pad set_location_assignment PIN_AG25 -to termination_blk0~_rdn_pad set_instance_assignment -name PASSIVE_RESISTOR "PULL-UP" -to OCT_RUP set_instance_assignment -name PASSIVE_RESISTOR "PULL-DOWN" -to OCT_RDN set_location_assignment PIN_AV32 -to M1_DDR2_dq set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS I" -to M1_DDR2_dq -tag __ddrRAM set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to M1_DDR2_dq -tag __ddrRAM set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to M1_DDR2_dq -tag __ddrRAM ----------------- The pin-assignment-file was partially created with the tcl-script (tools -> tcl scripts -> pin_assignments.tcl), that was generated with the megafunction. Can anyone help me? Or can anyone submit a working pin-assignment-file for stratix iv? Greetz
In UniPHY the oct pins are called OCT_rup and OCT_rdn. This is what you need to connect your pin assignments to.In your project they are connected to termination_blk0~_rup_pad etc. This is an AltmemPHY thing. Reassign these pins assignments to the correct pins. I would delete all assignments and rerun the <>_pin_assignments.tcl file.