FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.

TSE hardware design

Altera_Forum
Honored Contributor II
899 Views

hello, 

 

I am trying to make a Ethernet connection to the pc with a DE2-115. the design should be in hardware I don't want to use the NIOS soft core. 

 

does anyone have any experience about setting up an Ethernet connection using a VHDL design. 

 

ore can someone provide me with a working sample code/project? 

 

kind regards. 

JR
0 Kudos
5 Replies
Altera_Forum
Honored Contributor II
97 Views

I think there are some examples of UDP offload. But they will still use a nios cpu for network admin (etc).

Altera_Forum
Honored Contributor II
97 Views

You'll hardly set up the PHY without Nios... The rest stuff can be done only in hardware.

Altera_Forum
Honored Contributor II
97 Views

Hi, 

 

please have a look on my thread called "TSE by using System Console on DE2-115" ... it could answer your question.
Altera_Forum
Honored Contributor II
97 Views

first of all thanx for the fast response... but is it really that hard to make a Ethernet connection without NIOS :s 

 

@rickfan: I will look at your post hopeful it works for me. 

 

but i'm still open for new suggestions...
Altera_Forum
Honored Contributor II
97 Views

 

--- Quote Start ---  

 

 

...is it really that hard to make a Ethernet connection without NIOS :s 

 

 

--- Quote End ---  

 

 

 

If you are using a PHY chip such as National's DP83848, you can set up the basic operational modes using pin configurations. The data sheet for the PHY will explain this. When configured for Auto-negotiate mode the PHY will establish an ethernet connection automatically and enable you to transfer raw data in nibble-wide format - all without software intervention. If you want anything more sophisticated than this, such as a TCP/IP stack, your best solution would be using a Nios II rather than VHDL. 

 

It can be a steep learning curve to implement a Nios II, but when you consider setting up TX/RX buffers, packet processing, and all else required for an IP stack, a VHDL solution would be quite a challenge, too.
Reply