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Triple-Speed register configuration

Altera_Forum
Honored Contributor II
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Hi all. I'm using tse single port rgmii arria v gx project (AN647) and configure command_config register fields via tcl scripts. Is there a possibility to configure this register in project, to avoid doing this every time after programing FPGA? 

 

 

Thanks for your time.
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Altera_Forum
Honored Contributor II
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Hi,Andrey13! Can you tell me how to configure register with tcl scripts? The user guide says: 

"At the minimum, you must 

configure the following functions: 

• Primary MAC address (mac_0/mac_1) 

• Enable transmit and receive paths (TX_ENA and RX_ENA bits in the 

command_config register)" 

But I don't know how to write these registers. 

Anything can help! 

Best wishes!
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Altera_Forum
Honored Contributor II
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Hi, siepha. You must connect your board with JTAG interface. Then go to Qsys -> Tools -> System Console. Set the root directory with your tcl scripts "cd C:/.../sc_tcl". Then run config.tcl "source config.tcl". Good luck!

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