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Trying to erase a sector in the cfm. However, in simulation, I never get a busy signal. help

NBRUM
Beginner
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// Address values for the control and status register (csr) parameter FLASH_STATUS_REG_ADDR = 1'b0, // only for read operations parameter FLASH_CONTROL_REG_ADDR = 1'b1, // for read and write operations // Write protection parameters // Write protection 1'b1 for enabled and 1'b0 for disabled. parameter SECTOR_1_WRT_PROTECTION_INDICE = 23, // writedata indice that needs to change parameter SECTOR_2_WRT_PROTECTION_INDICE = 24, // writedata indice that needs to change parameter SECTOR_3_WRT_PROTECTION_INDICE = 25, // writedata indice that needs to change parameter SECTOR_4_WRT_PROTECTION_INDICE = 26, // writedata indice that needs to change parameter SECTOR_5_WRT_PROTECTION_INDICE = 27, // writedata indice that needs to change parameter ENABLE_WRT_PROTECTION = 1'b1, // enables the write protection for a section parameter DISABLE_WRT_PROTECTION = 1'b0, // disables the write protection for a section parameter READ = 1'b1 , parameter WRITE = 1'b1 // Erase on-chip flash operation parameter ERASE_INDICE_START = 20, // writedata indice start for writedata parameter ERASE_INDICE_END = 22, // writedata indice end for writedata parameter SECTOR_1 = 3'b001, // writedata value to erase sector 1 parameter SECTOR_2 = 3'b010, // writedata value to erase sector 2 parameter SECTOR_3 = 3'b011, // writedata value to erase sector 3 parameter SECTOR_4 = 3'b100, // writedata value to erase sector 4 parameter SECTOR_5 = 3'b101, // writedata value to erase sector 5 onchip_flash_csr_writedata[SECTOR_3_WRT_PROTECTION_INDICE] = DISABLE_WRT_PROTECTION; onchip_flash_csr_writedata[ERASE_INDICE_END : ERASE_INDICE_START] = SECTOR_3; onchip_flash_csr_address = LASH_CONTROL_REG_ADDR; onchip_flash_csr_write = WRITE;

My code above is part of my module and should yield a busy erase signal but does not. Any advice would be great. I am using Questa. For more context. I am trying to design an module for manual RSU because I can not use Nios.

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JohnT_Intel
Employee
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Hi,

 

We do not support simulation on On Chip Flash IP. You can only use the On Chip Flash IP with preloaded data. Other function is not supported

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NBRUM
Beginner
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It was due to the timing. I had an incorrect clock. Once I fixed that the ip core simulated fine.

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JohnT_Intel
Employee
446 Views

Hi,

 

I am glad that the issue is due to timing where using incorrect clock.

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