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Tutorial: Using the USB-Blaster as an SOPC/Qsys Avalon-MM master

Altera_Forum
Honored Contributor II
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Hi all, 

 

I've put together a tutorial on how to use the Altera JTAG-to-Avalon-MM master and Altera Verification IP Avalon-MM BFM Master under both SOPC builder and Qsys. 

 

http://www.ovro.caltech.edu/~dwh/correlator/pdf/altera_jtag_to_avalon_mm_tutorial.pdf (http://www.ovro.caltech.edu/%7edwh/correlator/pdf/altera_jtag_to_avalon_mm_tutorial.pdf

http://www.ovro.caltech.edu/~dwh/correlator/pdf/altera_jtag_to_avalon_mm_tutorial.zip (http://www.ovro.caltech.edu/%7edwh/correlator/pdf/altera_jtag_to_avalon_mm_tutorial.zip

 

The tutorial walks the user through the creation of an SOPC or Qsys system design, and provides scripts that automate the re-generation of the system. The tutorial shows how to simulate using Modelsim-ASE, and shows how to communicate with the hardware using System Console, quartus_stp, and then how to run a TCP/IP server under System Console or quartus_stp, and then communicate with that server from client code written in Tcl/Tk (a simple GUI) and a command-line C interface. 

 

Let me know if you like it, or have feedback/suggestions on how to improve the document. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Just use the JTAG-to-Avalon-MM bridge and connect it as another master to the memory. 

 

Cheers, 

Dave 

--- Quote End ---  

 

 

But on the pc side, it's there an altera tool to transfer data, or would it require a custom (tcl) application. For example, I found this but also doesn't seem to be for bust transfers.: 

Goo.gl/JKcw2M
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

But on the pc side, it's there an altera tool to transfer data, or would it require a custom (tcl) application 

--- Quote End ---  

 

If you read the tutorial you would know the answer. I provide several options using Altera tools, and in the discussion above described how you can create custom software to access the core, but that takes much more work, and may break at anytime if Altera decides to change the protocol. 

 

If you need to transfer data, just add a USB-to-UART/FIFO. FTDI have plenty. They're fast, read these ... 

https://www.ovro.caltech.edu/~dwh/correlator/pdf/ftdi.pdf 

https://www.ovro.caltech.edu/~dwh/correlator/pdf/ftdi_spi.pdf 

 

Or use an AVR-USB or ARM-USB enabled micro. You'll be much happier than you would be reverse-engineering Altera's stuff ... 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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*** OFF TOPIC *** 

Hi Dave, 

 

this is a little bit "off topic", but what (I suppose) Latex package do you use for your timing diagrams? 

 

Regards, 

Maik
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Altera_Forum
Honored Contributor II
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Hi Maik, 

 

--- Quote Start ---  

 

this is a little bit "off topic", but what (I suppose) Latex package do you use for your timing diagrams? 

 

--- Quote End ---  

 

I use Inkscape (a free drawing tool). It generates nice .pdf files and understands how to tear a PDF apart, so I can extract pages from data sheets, pull the images into Inkscape, and then annotate the images. For the timing diagrams, I just draw things by hand ... time consuming the first time, but most of the time I just start with a previous diagram. I can post the Inkscape .svg file for anything you'd like so you can play with it. Just ask. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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Hi Dave, 

 

thanks for the answer and offer to provide some .svg files. Coincidentally, I installed Inkscape a couple of weeks ago in order to draw a (very simple) diagram for a paper I had to prepare. 

 

So yes, if you would provide some of your svg files (e.g. figures 18 and 29 from your ftdi.pdf), I'd be happy to have a look into it in order to see, if I could use this for some of my documentation, too. 

 

Very kind offer of yours, thank you! 

 

Regards, 

Maik
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Altera_Forum
Honored Contributor II
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Maik, sorry I haven't read the forum for a while. Please email me at my forum name and I'll send a zip file. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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Hi Dave, 

I integrated JTAG to Avalon MM Master bridge in to my design and tried write-read memories (implemented as Avalon Slaves) with the Client-Server scripts that you have provided. 

(Using Centos 5.9 and Quartus 16.0) 

I could start the server with  

% quartus_stp -t jtag_server.tcl 

Opened another tab  

% gcc -Wall -o jtag_client jtag_client.c 

% ./jtag_client -w 0x0000 -d 0x12345678 

(SRAM sits on 0x0000) 

 

It shows me following messages on client side: 

 

============================================= 

[svaishampayan@dev01 jtag_client_server]$ ./jtag_client -w 0x0000 -d 0x12345678 

Connect to server localhost:2540 

JTAG write (address, data) = (0x00000000, 0x12345678) 

[svaishampayan@dev01 jtag_client_server]$  

 

 

============================================= 

 

On Server side: 

============================================= 

 

JTAG: USB-BlasterII [USB 1-3.1], FPGA: @1: 10AT115S(1|2) (0x02E060DD) 

Start the server on port 2540 

 

Wait for clients 

 

Accept sock2aaaab339790 from 127.0.0.1 port 56979 

Handle the client via a fileevent callback 

SERVER (sock2aaaab339790): jtag_write 0x00000000 0x12345678 

SERVER: jtag_write 0x00000000 0x12345678 

SERVER (sock2aaaab339790): Invalid command from the client 

SERVER (sock2aaaab339790): empty command 

SERVER (sock2aaaab339790): disconnected 

 

[svaishampayan@dev01 jtag_client_server]$  

============================================= 

 

Could you please explain why it is saying "Invalid command from the client"? 

 

Thanks in anticipation! 

 

Regards 

Sagar.
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Altera_Forum
Honored Contributor II
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If you do not use 8/10B encoding, then you have to synchronize the links yourself. For example, I have used the transceiver sync pattern detect logic, and hard-coded it to the start of a PRBS sequence and used that to synchronize lanes.

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Altera_Forum
Honored Contributor II
1,205 Views

Hi all, 

It worked on System Console. Thanks.
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Altera_Forum
Honored Contributor II
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Hi Dave, 

There are 2 more issues I am facing while using JTAG to Avalon MM Master over USB Blaster Cable using the jtag_write and jtag_read scripts: 

 

------------------------------------ 

Issue-1: 

I have put together Nios_II based system in QSYS wherein I am using mailbox.  

Mailbox is used to push commands from host on sender interface and Nios_II is supposed to read these commands from receiver interface. 

Mailbox sender interface is connected to JTAG to Avalon MM bridge (as I want to push the messages from Host via USB blaster cable to JTAG-Avalon bridge) 

Mailbox has 2-bits avalon address connected to it to access 4 registers inside.  

On system console, I am using the TCL script jtag_write to push message in to the mailbox.  

Issue is avalon address given is on byte boundary and the address has to be on 32-bit boundary.  

If I do: 

jtag_write 0x00009001 (to write in to mailbox pointer register) 

System Console issues error saying the address should be 32-bits aligned. 

 

How can I access the mailbox directly from JTAG-AvalonMM bridge directly?  

--------------- 

 

---------------- 

Issue-2: 

My SRAM is on 0x0000_0000 and SDRAM is on 0x8000_0000. 

When I write on SRAM using jtag_write and verify using jtag_read, it works fine. 

My observation is when I write on SDRAM address 0x8000_0000 and read back, it gives me the same data as SRAM 

Theoretically, JTAG address should support 32-bits ... I am not sure why this is happening. 

---------------- 

 

Regards 

Sagar.
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Altera_Forum
Honored Contributor II
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Hi!  

 

I hope it’s okay to dig up this thread. First of all, Thank you for the tutorial. It’s a shame Intel/Altera doesn't provide more information on this topic.  

 

Is there a way to start the SystemConsole directly in a terminal (i.e. like quartus_sh) without going through the Qsys GUI? I’d use your quartus_stp implementation but with it I’m getting this error: 

 

Edit: In the meantime I’ve found the system-console binary in quartus/sopc_builder/bin/system-console. With the --cli and/or --script parameters one can easily use it directly from a terminal or on a server for e.g. integration checks or remote programming. So everything’s solved! I can program the 8MiB SDRAM over JTAG using the Qsys SDRAM Controller! :)  

 

tcl> tcl> JTAG: USB-Blaster , FPGA: @1: EP2C(15|20) (0x020B30DD) tcl> Hub info: 0x8086E04 VIR m-width: 4 VIR n-width: 1 Manufacturer ID: 0x6E Number of nodes: 1 IP Version: 1 tcl> jtag_print_node_info invalid command name "jtag_print_node_infojtag_print_node_info" tcl> tcl> jtag_print_node_info Node index: 0 Node instance: 0 (0x0) Node manufacturer: 110 (0x6E) Node ID: 132 (0x84) Node purpose: 1 (0x1) Node version: 1 (0x1) tcl> jtag_read 0 0 Sending 4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A007B000000040000107A007CFC00 Received 4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A4A0000 Error: incorrect number of response bytes! (Got 0, expected 8) tcl>  

[additional output added by me for debugging purposes, nothing else changed]. In SystemConsole master_read/write_32 on that address works perfectly fine. 

 

I’m using Quartus 13.0.1 Web Edition with an Altera DE1 board. 

 

Could it be that the JTAG commands changed for 13.0? Or why am I getting a zero length response back? 

 

I’ve tried to load the SystemConsole packages in a quartus_sh Shell but apparently it’s not intended to be used that way. 

 

Thank you for any advice! 

 

Best regards, 

Michael
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Altera_Forum
Honored Contributor II
1,205 Views

Hi Michael, 

 

--- Quote Start ---  

 

I hope it’s okay to dig up this thread. 

 

--- Quote End ---  

 

Sure :) 

 

I wrote the quartus_stp as a work-around while I figured out the SystemConsole version. Earlier versions of SC had a broken Tcl implementation, but I'm pretty sure it got fixed - look at the Tcl code, I'm usually pretty good at leaving comments in there. 

 

Given that Altera/Intel probably isn't putting any effort into quartus_stp, I'd recommend using SystemConsole. I think from your comments above SC is working for you. If not, let me know, and I'll fire up a board and see if I can break it in the same way you do. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
1,205 Views

 

--- Quote Start ---  

 

I can program the 8MiB SDRAM over JTAG using the Qsys SDRAM Controller! 

 

--- Quote End ---  

 

I posted a couple of memory interface examples in these threads; 

 

Post#5: BeMicro-CV DDR example 

https://www.alteraforum.com/forum/showthread.php?t=43992 

 

De0-nano SDRAM 

https://www.alteraforum.com/forum/showthread.php?t=45927 

 

Look at the code, and perhaps you'll find something useful. 

 

Cheers, 

Dave
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SBinS
Beginner
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Hi, I am working on the tutorial and get stuck at the master_write or master_read command line. I'm using the Quartus Prime Lite 19.1 and Platform Designer (formerly Qsys), I wrote those line command in TCL console in System Console and get the error saying the transaction is taking longer than 10 seconds and continue for another 50 seconds, then it said the system console is giving up. I tried everything to rectify the problem like correcting the path for the environment variable, update to latest Quartus Prime (on having the problem I used version 18.1). Is there any specific set up before using the command line that I need to set in my computer? Any helps are indeed great.

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covfefe
New Contributor I
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@Altera_Forum Thank you for these files. 

I have been able to use them on System Console 12.1 CLI for awhile now. It works great.

I recently updated to newer versions (Version 18.0, Version 21.1 850, Version 22.2 94) CLI and unfortunately there I cannot send commands from the client to the server anymore. It crashes here:

 

proc client_handler {client} {
[...]
# Execute the command and return the response
# puts "CLIENT ($client): $cmd"
if {[catch {eval $cmd} rsp]} {

 

The same exact code works on the GUI (non-CLI). 

I can connect just fine. I can modify the TCP starting script, and execute commands anywhere (ex: puts [get_service_types]) outside of server_accept, & client_handler

Executing the same one inside of either, Java VM JRE crashes (similarly to any command passed through by the client). 

Would anyone have an idea of what is happening?

 

 

 

right here it crashes XXserver_acceptXX
#
# A fatal error has been detected by the Java Runtime Environment:
#
#  EXCEPTION_ACCESS_VIOLATION (0xc0000005) at pc=0x000000006182ba52, pid=23628, tid=0x000000000000550c
#
# JRE version: OpenJDK Runtime Environment (8.0_322-b06) (build 1.8.0_322-b06)
# Java VM: OpenJDK 64-Bit Server VM (25.322-b06 mixed mode windows-amd64 compressed oops)
# Problematic frame:
# V  [jvm.dll+0x13ba52]
#
# Failed to write core dump. Minidumps are not enabled by default on client versions of Windows
#
# An error report file with more information is saved as:
# C:\Program Files (STL)\quartus_systemconsole_21_1\sopc_builder\bin\hs_err_pid23628.log
#
# If you would like to submit a bug report, please visit:
#   https://github.com/adoptium/adoptium-support/issues
#
# Start the server on the specified port
proc server_listen {port} {
	puts "right here it works XXserver_listenXX"
		puts [get_service_types]
		puts "it just worked"
		
	global jtag
	if {[catch {socket -server server_accept $port} result]} {

#		error "Error: Server start-up failed\n -> $result"
		puts "Error: Server start-up failed\n -> $result"
                exit
	}
	set jtag(port)   $port
	set jtag(socket) $result
	return
}
# Server client-accept callback
proc server_accept {client addr port} {
		puts "right here it crashes XXserver_acceptXX"
		puts [get_service_types]
		puts "uh oh"

 

 

 

 

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