FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6373 Discussions

UDP/IP-core for the TSE?

Altera_Forum
Honored Contributor II
‎03-29-2009 05:08 PM
979 Views

Hi there! 

 

I've been looking for an RTL component to use in a video streaming application. Since latency is an issue here I need to add UDP/IP headers in RTL. Any suggestions? 

 

Will the UDP component of Altera's "Video over IP ref example" work on my Cyclone III Video Kit? 

 

Thanks in advance!
0 Kudos

Link Copied

2 Replies
Altera_Forum
Honored Contributor II
‎03-30-2009 07:18 AM
226 Views

Have a look at that example (http://www.nioswiki.com/exampledesigns/nios2udpoffloadexample) from the Nios Wiki.

0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎03-30-2009 08:22 AM
226 Views

Thanks! 

I will try to port this to the Cyclone III
0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.