Unable to generate the VHDL model files for Interlaken using Quartus-II -11.0

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PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

Unable to generate the VHDL model files for Interlaken using Quartus-II -11.0

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I am trying to generate the VHDL format files for Interlaken Mega core using QuartusII 11.0 (Mega-Wizard Plugin Manager)

But it generates only verilog version even if i select the vhdl type on MegaWizard Plug in Manager

I dont have a mixed simulator

Some one help me of how to generate the vhdl version files for Interlaken Protocol

Thanks & Regards

M Kalyansrinivas

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