First of all I'm a beginner in FPGA programming and i don't know if my whole approach to this is wrong.
I'm currently trying to serialize 48 Bits of Data with an DS90CR485-Serializer(http://www.ti.com/lit/ds/symlink/ds90cr485.pdf) .
I'm using a DE10-Nano Development Board(Cyclone V) and the Serializer is connected to 24 GPIO Output Pins. The I/O-Standard of the Pins is set to 3,3-V LVVTL.
I'm using the ALTLVDS megafunction to write Data to the LVTTL-Input Latches of the DS90CR485 (via the GPIOs). The Clock provided for the serializer comes from an external clock oscillator (at 100Mhz).
For the number of Channels I configured the megafunction to 24 Channels that are connected to the 24 GPIO Pins with deserialization factor of 2. I do this because I have 48 bits of input data that have to be serialized.
Apparently this configuration doesn't work. Is it even possible to use the ALTLVDS_TX megafunction to achieve this? Or do i have to implement the circuitry to control the Serializer on both positive and negative Edge from scratch?
What am i doing wrong here?
The input is LVTTL, so you should connect LVTTL to it.
If you are using ALTLVDS_TX, i dont see why you need to use the external serializer. But it depends on device whether you can span to 24 channels, you will need to check the guideline if your selected device supports it.