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VIP: Frame Buffer data rate and DDR2-RAM interface speed

Altera_Forum
Honored Contributor II
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Hello, 

 

I've got a question to understand the Frame Buffer and the DDR2-RAM interface speed. For me there is a discrepancy between the following to facts (I'm using Cyclone III Dev. Kit): 

 

1. On page 8 in "1. Cyclone III Device Family Overview" is said: 

"... DDR2 SDRAM memory interfaces support data 

rates up to 400 Mbps for Cyclone III devices and 333 Mbps for Cyclone III LS devices. ..." 

So does it mean that I can't read data from DDR2-RAM with more than 400Mbps? 

 

2. So I also used the VIP-Suite. There is a Frame Buffer, which puts video data to DDR2-RAM using the DDR2 High Performance Controller. So if I have a video stream 1080p60 that means: 

1920px * 1080px * 24bit (color depth) * 60Hz = 2986Mbps 

And the system works.  

 

So how could it be? Because 2986Mbps is much faster than 400Mbps... And what is the maximum data rate I can use Cyclone III + DDR2 High Performance Controller? 

 

So, what did I get wrong? 

 

Thanks for really every hint! 

 

Best regards, 

tonib
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Altera_Forum
Honored Contributor II
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See my reply in the 'FPGA, Hardcopy, and CPLD Discussion ' forum. 

You shouldn't start 2 threads for the same question.
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Altera_Forum
Honored Contributor II
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Hey josyb, 

 

yea thanks... you are right, i'm sorry... i'll never do it again...
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