FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

VIP format

Altera_Forum
Honored Contributor II
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hello there, Happy new year. 

 

I am studying VIP suite and avalon-ST stream data. 

 

as far as I read data format of Video stream of VIP suite, it describes only one pixel ( at most ). 

you can specify bit-width, but still for one-pixel. 

I tested with test-pattern-generator core. 

 

I want to send paralleled data, via avalon-ST. 

 

I do know I can send multiple bit data via avalon-ST as many as I want. 

but I am wondering if those data are illegal as VIP suite format. 

 

could somebody give me a hint?
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Altera_Forum
Honored Contributor II
301 Views

It should not be illegal, but in my mind no VIP-Suite Core supports streaming-transfers with more than one pixel per clock.

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Altera_Forum
Honored Contributor II
301 Views

thanks Taz1984. 

 

I understand it. 

I think I have to make whole IP's by my self.
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Altera_Forum
Honored Contributor II
301 Views

HI akira! 

Did you try 14.0 version VIP? As I can see in description, most IP cores supports up to 4 pixels in parallel instead of 1 pixel for 13.1 version.
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