FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6355 Discussions

VIP format

Altera_Forum
Honored Contributor II
‎01-04-2015 03:21 PM
935 Views

hello there, Happy new year. 

 

I am studying VIP suite and avalon-ST stream data. 

 

as far as I read data format of Video stream of VIP suite, it describes only one pixel ( at most ). 

you can specify bit-width, but still for one-pixel. 

I tested with test-pattern-generator core. 

 

I want to send paralleled data, via avalon-ST. 

 

I do know I can send multiple bit data via avalon-ST as many as I want. 

but I am wondering if those data are illegal as VIP suite format. 

 

could somebody give me a hint?
0 Kudos

Link Copied

3 Replies
Altera_Forum
Honored Contributor II
‎01-05-2015 06:06 AM
213 Views

It should not be illegal, but in my mind no VIP-Suite Core supports streaming-transfers with more than one pixel per clock.

0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎01-05-2015 11:53 PM
213 Views

thanks Taz1984. 

 

I understand it. 

I think I have to make whole IP's by my self.
0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎01-10-2015 02:17 PM
213 Views

HI akira! 

Did you try 14.0 version VIP? As I can see in description, most IP cores supports up to 4 pixels in parallel instead of 1 pixel for 13.1 version.
0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.