Hi,I am currently helping a software developer to get our video pipeline going. Something wasn't working so I started reading back his register entries using the JTAG to Avalon Master Bridge. While trying to verify the registers in the VIP Switch module I keep getting value 1 for the Dout0 Output Control, no matter what I write into that register. The manual does not state this to be a write-only register. Is it, though? If it is, could that maybe be fixed in future releases? Kind of difficult to debug, if you can't check what you did. Why would it not be a full read and write register? :confused:
Hi,I have also seen this and have also assumed that the register is write only. Many of the VIP cores only provide read back of the status register, probably to minimize resource usage. And the VIP documentation is not particularly clear on the exact details of each core's control interface. Why not add R/W column to each table in the UG to clarify this? Other parameters, like register width, and whether the interface uses native addressing or not, should also be explicitly stated. I have lost quite some time debugging problems that turned out to be incorrect assumptions about the control interface parameters. Not everybody out there uses a 32-bit bus with a NIOS attached to it. I also feel that adding read-back capability to all control register usually adds very little resources and makes testing and debugging much easier. Any custom cores I write, I always make the control and configuration registers readable. Regards, Niki
Hi Nikki,I totally agree. Maybe adding a checkbox to the GUI that lets you select if you want readback or not would help as well. That way it would be possible to debug the design until everything works and then the readback feature could be removed, because it is no longer needed.