FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

Video IP

Altera_Forum
Honored Contributor II
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Hello  

 

I will make a camera tracking system on SopC on a Cyclone II DE2 EP2C35 Board. 

To begin I will start with a simply Video communication, I try wit this IP-Blocks: 

 

- cpu 

- on-chip-memory 

- cfi-flash 

- sysid 

- timer 

- sdram 

- pll (c0= sdram_clk, c1= clk) 

- Video In 

- Frame Buffer 

- Video Out 

 

The Output for the Video Out is for a VGA-Monitor. But I d'ont have the right output pins on the Video Out in my system. 

Can explain me, what for IP-Blocks I need for make a video communication (camera in on jack and Video Out to a VGA-Monitor)? 

 

Thank you.
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Altera_Forum
Honored Contributor II
359 Views

what is wrong with the outputs on your block? have you configured the Clocked Video Output for your VGA standard?

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Altera_Forum
Honored Contributor II
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I have not the output R[7..0], G[7..0], B[7..0], HS, VS, Dclk, for a connection with the VGA-Device on the DEII Board. I configure the Video-Out as a NTSC output. I thing I must configure that otherwise. 

Can you explain me what for a block or configuration i need at the output to the VGA-Device?
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Altera_Forum
Honored Contributor II
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video data comes out as a single bus rather than broken out as R, G, and G signals. you need to port map the 24 bit bus into your 3 components 

 

horizontal and vertical sync aren't present because you have selected NTSC which uses synchronization signals embedded in the video data. in the Clocked Video Output you need to select sync on separate wires. 

 

i imagine dclk is the input clock vid_clk to your Clocked Video Output. 

 

you need to look up the timing signals associated with your desired video standard to fill into the Clocked Video Output.
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Altera_Forum
Honored Contributor II
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file:///C:/Users/ANTONI%7E1/AppData/Local/Temp/moz-screenshot.png file:///C:/Users/ANTONI%7E1/AppData/Local/Temp/moz-screenshot-1.png I try to make a circuit below: 

 

see attachment 

 

I thing that the pixel-converter and the video-sync- generator must not implement in the circuit. Is that right? 

 

Is the functionality of the frame buffer, to store frame in the sdram? 

 

How can I store frame without use a frame buffer? 

 

I assume that i must convert YCbCr to RGB first, before i can make video image proccessing, example a easy black point on white surface tracking with camera? 

 

Before i begin with the camera tracking i will mafe first a easy video circuit on vga monitor... 

 

 

Thanks for any tipps...:)
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Altera_Forum
Honored Contributor II
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Well, I dont' know your video and components requirements, but I would try to use the clocked video output instead the VGA blocks you are using right now.. 

Then 

I think you should use different clocks for video input and video pipeline. 

about your frame buffer, what kind of ram are you using? 

Are you sure you have enough bandwidth in your system?
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