Warning(12620): Input port OE of I/O output buffer "mdio~output" is not connected, ...

[Zarquin]

Warning(12620): Input port OE of I/O output buffer "mdio~output" is not connected, but the atom is driving a bi-directional pin

What does this error message mean?

The error message appears as a fitter warning in a project with MAC TSE IP Core connected to a KSZ9031MNX PHY and  refers to the mdio interface to the phy

• Variant: Fifoless TSE MII/GMII
• FPGA : C10GX200
• Quartus Prime Pro 23.1
• No Nios
• Avalon-ST resp. reg clock: 125MHz
• MDIO is activated in the IP Core, clock divider is 100 (1.25MHz) -  I tried 50 too (2.5MHz)

mdio (inout) and mdc (out) ports of the FPGA are connected to the right pins. (I have not assigned any other pin properties.)
The io buffer is implemented as follows:

signal mdio_in       : std_logic;      
signal mdio_out      : std_logic;     
signal mdio_oen      : std_logic; 
...
mdio_in <= mdio ;
mdio    <= mdio_out when (mdio_oen = '0') else 'Z';  -- mdio_oen = active low 

mdio_in (in), mdio_oen (out), mdio_out (out) and mdc are connected to the TSE IP Core.
mdc and mdio are connected to the FPGA pins.

I cannot send data to the phy via mdio or read data from the phy. This may have something to do with the above error message.

In signal tap I see the mdc clock, but no edge change on any of the signals: mdio_oen, mdio_out or mdio_in. (I expect an edge change when I write to or read from the MAC  address 0x80 where the registers of the PHY are mapped to.)
No MDIO transaction takes place and the reg_busy signal remains high indefinitely.

Any idea what may be the reason for this problem or for the warning?

[AqidAyman_Intel]

Hi,

The warning message is due to the I/O output buffer "mdio~output" enable port is not connected. You need to ensure that the specified input port is connected. Can you confirm on this?

Regards,

Aqid