FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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When i try to simulate a PCIE example design the simulation time is very large. How can it be optimized to reduce the simulation time

lv0001
Beginner
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Kenny_Tan
Moderator
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Are you using modelsim altera edition? If you want to use faster time, you have to choose PE or DE version. https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd04202001_4087.html
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lv0001
Beginner
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I am using the Modelsim Altera starter edition . What does SE or DE means and it needs separate license to be purchased please let me know . Alsonhowndoni include memeber in this conversation who are having Altera account. Since I am not able to add pavan.bhandhari@blackpeppertech.com
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hans86
Novice
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The problem with the Starter edition is not the simulation speed (close to 40% of PE/DE) but the instance limit, if you hit this limit (which I suspect you do with a PCIe core) your simulation speed will effectively grind to a halt (1% of PE/DE speed). You should get a warning that you have hit this limit, if not check your simulation speed (using the simstats command) and the beginning and end of your simulation, you should see quite a difference.

 

As KTan9 mentioned you need to purchase either the Intel-Modelsim version or the full PE/DE version from Mentor which is not cheap but does not have any speed restrictions and comes with a lot of other goodies such as code coverage. Modelsim DE has (amongst others) full assertion support which can be used for functional verification.

 

Good luck,

Hans.

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Kenny_Tan
Moderator
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You can refer to https://www.intel.com/content/www/us/en/software/programmable/quartus-prime/model-sim.html, you may have to contact mentor for the purchase
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