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Which I/O standard should i use for ASI_RX MegaIP

Honored Contributor II

The following is a asi_rx module i creat with MegaWizard. 

The device i use is EP4CGX30F324. 

Pin T1&T2 are asi input. 

I set the asi_rx signal to T2,and set I/O standard as LVDS. 

But i can't finish fit step. 

The quartus error message is : 

Error: I/O bank QL0 contains input or bidirectional pins with I/O standards that make it impossible to choose a legal VCCIO value for the bank 


I think I/O standard should be LVDS.Am i wrong? 


asi_in asi_rxins( 












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Honored Contributor II

some bank don't surport LVDS