Re: about GIGE IP tx and rx pin fit - Intel Community

FPGA Intellectual Property

PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

about GIGE IP tx and rx pin fit

956 Views

how do i implement altgx gige ip rx ang tx pin fit using the lvds i/o standar(not gxb) stratix iv devices? and where can setting?

Link Copied

1 Reply

231 Views

You cannot.

If you are using the ALTGX, then you are going to physically need to use the pins on the chip that connect to the RX and TX IO for those "hardware elements (The ALTGX elements)".

Regards.

Copy link

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.