adding 2 high speed reed solomon decoders increased the 'Logic Utilization' in 20% (only 7% was expected based on other project where i also added the same 2 high speed reed solomon decoders).

[OLevy1]

based on the reports i have attached (5100 is before i added the decoders and 5101 is after), can someone tell me why the 'Logic Utilization' increased so much?

thanks,

Oren

[CheePin_C_Intel]

Hi,

As I understand it, you have some inquiries related to the logic utilization of the HS RS IP core in your design. For your information, you may then refer to the "Table 6. Performance and Resource Utilization for Stratix V Devices" in the High speed Reed solomon IP Core User Guide for the estimation of the resource utilization per HS RS IP core for your specific configuration. 

As I compare the fit.summary reports for 5100 and 5101, I can observe differences between the resource utilization. Note that I notice that there seems to be differences between the number of XCVR channel use between the two design. To ease the comparison, I would like to recommend you to test with simple design ie with only 1 input and 1 output pin. Then compare the resource utilization with compilaton after adding one or two HS RS IP cores. You can then cross check with the Table 6 to see if there is any significant discrepancy.

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin

[OLevy1]

thanks Chee,

indeed there is a difference in the XCVR channel because i reduce the triple speed Ethernet core.

did you see anything in the .QSF that might cause that problem?

Oren

[CheePin_C_Intel]

Hi,

As I go through the QSF files and perform a diff, for your information, I do not spot significant different which might lead to the resource utilization difference. The only different which might be related is the following:

5100.QAR

set_global_assignment -name FITTER_AGGRESSIVE_ROUTABILITY_OPTIMIZATION NEVER

5101.QAR

set_global_assignment -name OPTIMIZATION_MODE "AGGRESSIVE PERFORMANCE"

I am not sure how these would impact the utilization but for better comparison, generally it is recommended to use the same settings as much as possible.

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin

[OLevy1]

Hi Chee,

i tried the new design (v5101) with the same assignment and there was no utilization impact.

any other suggestions?

thanks,

Oren

[CheePin_C_Intel]

Hi,

Thanks for your update. For your information, after design compilation, you can check the resource utilization by the HS RS decoder instance at Fitter -> Resource Section -> Resource Utilization by Entity. You may then cross check the resource utilization between your two design to see if there is any anomaly.

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin

[CheePin_C_Intel]

Hi,

Just would like to follow up with you on this.

[CheePin_C_Intel]

Hi,

As I understand it, it has been some time since I last heard from you. I would set this case to closed at this moment. Feel free to file a new case if you have any further question related to this request. Thank you for your understanding.

Best regards,

Chee Pin