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FPGA Intellectual Property
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FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Discussions
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LVDS Serdes DPA FIFO reset recovery timing violation issue (Cyclone 10 GX)
by
designEngineer
on
04-29-2020
05:32 PM
Latest post on
06-24-2020
08:49 PM
by
KennyT_Intel
10
Replies
119
Views
0
10
TSE - PCS only internal loopback problem
by
SKon1
on
06-17-2020
12:02 PM
Latest post on
06-24-2020
07:51 PM
by
SengKok_L_Intel
6
Replies
45
Views
0
6
Generation of PCI Express Avalon ST Example
by
PVanL
on
06-17-2020
09:01 AM
Latest post on
06-24-2020
07:45 PM
by
SengKok_L_Intel
2
Replies
34
Views
0
2
Where is the legacy interrupt enable/disable flag?
by
SimonRichter
on
06-13-2020
09:58 AM
Latest post on
06-24-2020
07:42 PM
by
SengKok_L_Intel
6
Replies
76
Views
0
6
A code reviewer has suggested that my main 50MHz input clock from an external crystal oscillator should be input to a PLL within the FPGA to produce a...
by
FRobe6
on
06-15-2020
11:32 AM
Latest post on
06-24-2020
09:29 AM
by
EngWei_O_Intel
3
Replies
29
Views
0
3
Testing
by
BoonT_Intel
on
06-23-2020
06:09 PM
0
Replies
5
Views
0
0
dummy content for move
by
on
06-23-2020
05:36 AM
0
Replies
2
Views
0
0
Arria 10 Transceiver Native Phy PMA Latency
by
AGord11
on
06-19-2020
04:45 AM
Latest post on
06-22-2020
11:43 AM
by
CheePin_C_Intel
1
Reply
10
Views
0
1
PCS bonding channels must be locked in ascendning and continous order.
by
EMOEN
on
06-08-2020
06:29 AM
Latest post on
06-22-2020
08:27 AM
by
Deshi_Intel
6
Replies
57
Views
0
6
I am using IOPLL Intel FPGA IP for Aria 10 SoC device. I need a clock of 307.2MHz/30.72MHz with a ref Clock of 10/100MHz . How can I get the exact clo...
by
ABhus
on
06-12-2020
07:49 AM
Latest post on
06-22-2020
08:11 AM
by
EngWei_O_Intel
7
Replies
39
Views
0
7
Please confirm the below product is MSD or not? Also Confirm MSL As per digikey web site it is showing MSL as 3. P/N: 10M25SAE144C8G Description: PROG...
by
Vvc001
on
06-20-2020
07:01 AM
Latest post on
06-22-2020
05:46 AM
by
NurAiman_M_Inte
l
1
Reply
7
Views
0
1
TSE - purpose of "rx_recovclkout"
by
SKon1
on
06-20-2020
09:37 AM
Latest post on
06-22-2020
05:08 AM
by
Deshi_Intel
1
Reply
11
Views
0
1
obtencion de RMA# para material con fallo de produccion
by
MSala13
on
06-18-2020
06:40 PM
Latest post on
06-22-2020
12:16 AM
by
Zawani_M_Intel
1
Reply
13
Views
0
1
Warning of timing analysis of UniPHY IP
by
XShen1
on
06-21-2020
06:27 AM
Latest post on
06-21-2020
06:28 AM
by
XShen1
1
Reply
13
Views
0
1
How to store user data necessary on the next power up
by
SCroi1
on
06-19-2020
03:17 PM
0
Replies
13
Views
0
0
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