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Altera_Forum
Honored Contributor I
739 Views

ddr2 controller IP core

Hi all 

I had generated ddr2 controller from the altera tool and I want to check it using MODELSIM. But I am not able to run it as I am getting following error as auk_ddr_controller.v file not included. But this file is not generated by tool. How to overcome this problem?
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Altera_Forum
Honored Contributor I
46 Views

The file is come from the ddr controller library under your altera installation directory, normally under altera/7.2/ip/<ddr ip name>

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