eSPI reads are failing in quad mode with frequency 33MHz in Max 10 device.

[Ananthi]

we are using intel max 10 device (10M04SAU324I7G) with eSPI configuration of quad mode on 33mhz frequency. we are seeing the below errors 

Oct  3 00:20:21 PA-560 kernel: [   48.103006] AMD_ESPI: Error: unexpected eSPI status register bits set (Status = 0x10000010)
Oct  3 00:20:21 PA-560 kernel: [   48.103017] AMD_ESPI: espi_send_cmd, unexpected status code from slave
Oct  3 00:20:21 PA-560 kernel: [   48.103018] AMD_ESPI: eSPI cmd0-cmd2: 00300009 00000000 00000000 data: 00000000.
Oct  3 00:20:21 PA-560 kernel: [   48.103019] AMD_ESPI: Error: unexpected eSPI status register bits set (Status = 0x10000010)
Oct  3 00:20:21 PA-560 kernel: [   48.103031] AMD_ESPI: espi_send_cmd, unexpected status code from slave
Oct  3 00:20:21 PA-560 kernel: [   48.103031] AMD_ESPI: eSPI cmd0-cmd2: 00400009 00000000 00000000 data: 00000000.
Oct  3 00:20:21 PA-560 kernel: [   48.103032] AMD_ESPI: Error: unexpected eSPI status register bits set (Status = 0x10000010)
Oct  3 00:20:21 PA-560 kernel: [   48.103723] pci 0000:01:00.0: enabling device (0000 -> 0002)
Oct  3 00:20:21 PA-560 kernel: [   48.124026] AMD_ESPI: espi_send_cmd, unexpected status code from slave
Oct  3 00:20:21 PA-560 kernel: [   48.124031] AMD_ESPI: eSPI cmd0-cmd2: 00080008 00001117 00000000 data: 00000000.
Oct  3 00:20:21 PA-560 kernel: [   48.124034] AMD_ESPI: Error: unexpected eSPI status register bits set (Status = 0x10000010)
Oct  3 00:20:23 PA-560 kernel: [   49.768023] vfio-pci 0000:e2:00.2: vfio-noiommu device opened by user (supervisor:2237)
Oct  3 00:20:25 PA-560 kernel: [   51.175281] AMD_ESPI: espi_send_cmd, unexpected status code from slave
Oct  3 00:20:25 PA-560 kernel: [   51.175284] AMD_ESPI: eSPI cmd0-cmd2: 00080009 00000000 00000000 data: 00000000.
Oct  3 00:20:25 PA-560 kernel: [   51.175286] AMD_ESPI: Error: unexpected eSPI status register bits set (Status = 0x10000010)

we are using AMD 3000 processor as a eSPI master. In MAX 10 CPLD we are generating 100mhz (Espi IP/Avalon clk) clock from 25mhz(CPLD clock) using PLL and connected to eSPI IP clock(x3). we are not seeing any errors when we are operating in single IO mode with eSPI frequency 16Mhz. 

could you please suggest weather we can use eSPI frequency 33mhz in MAX 10 device or not ?

[aikeu]

Hi Ananthi,

Maybe can check if there is any difference in the data signal handling between the single mode and other mode being used referring to Single I/O, Dual I/O and Quad I/O Modes in the document:

https://www.intel.com/content/dam/support/us/en/documents/software/chipset-software/327432-004_espi_base_specification_rev1.0_cb.pdf

Thanks.

Regards,

Aik Eu

[aikeu]

Hi Ananthi,

I will close the thread if there is no further question.

Thanks.

Regards,

Aik Eu

[aikeu]

Hi Ananthi,

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

Thanks.

Regards,

Aik Eu