FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

ethernet ip

Altera_Forum
Honored Contributor II
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can i implement Triple Speed ethernet TSE core in max10 (10 M 16) device???? 

Resmi
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Altera_Forum
Honored Contributor II
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Why not? 

Taz
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Altera_Forum
Honored Contributor II
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Thanks for the reply.is it possible to implement the full logic in 16k.can you tell me how much le's will be used by tse.since I have to implement some more logic in Max10 I need to know that.

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Altera_Forum
Honored Contributor II
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That depends on the configuration of the TSE. Maybe you want to study the Data-Sheet of the TSE or give your configuration a try for synthesis, should not take too long, due to the small size of the chip...

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