FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5988 Discussions

how to use the GXB interfaces in stratixV?

Altera_Forum
Honored Contributor II
847 Views

hello everyone: The prbs signals of the transmission rate for 1G / sI just need to transmmit a PRBS signal of the rate for 2G bit / s through the GXB pins. I used ALTGX cores when I use stratix IV device. But the ALTGX don't support the stratix V device , which IP core should I choose to compelte my design?

0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
98 Views

ALTGX is for SIV, AII, and CIV 

For V series device, you can you custom phy or native phy.
Altera_Forum
Honored Contributor II
98 Views

 

--- Quote Start ---  

hello everyone: The prbs signals of the transmission rate for 1G / sI just need to transmmit a PRBS signal of the rate for 2G bit / s through the GXB pins. I used ALTGX cores when I use stratix IV device. But the ALTGX don't support the stratix V device , which IP core should I choose to compelte my design? 

--- Quote End ---  

 

 

 

It is better for u to use Native Phy. 

It provides more flexibiltyand more control. 

In addition, native phy is the direction for future support
Reply