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qsys avalon stream arbiter

Altera_Forum
Honored Contributor II
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I need module which has 2 Avalon-St sinks (data in) and single Avalon-St source (data out) and simply redirects one of the sink to source. Is there an option to make qsys infer arbitration logic and connect source0 streams from st_pipeline_stage_1/2 to sink0 stream in st_pipeline_stage_0? When I try to connect the second wire the first connection disappears.

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Altera_Forum
Honored Contributor II
518 Views

Just add a streaming mux. It's a standard component in the IP Catalog (Avalon-ST Multiplexer Intel FPGA IP). What kind of arbitration are you looking for?

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