FPGA Intellectual Property
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read from scfifo wrong!how to use it?

Altera_Forum
Honored Contributor II
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read from scfifo wrong! 

my fist read data should be 40h,but now is 00h. 

left picture is from ALERA ,right picture is from my singalTapII, 

whether phase position has some problem?
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Altera_Forum
Honored Contributor II
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please post in only one forum

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