FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5234 Discussions

A10 PAC板在行情解码开发中memory delay较大问题

NChen8
Partner
164 Views

Hi

用Opencl进行上交所行情解码开发时,遇到访问FPGA内部RAM时,导致该循环II值不为1,从而导致延迟过大

请帮忙分析问题所在,谢谢!

0 Kudos
1 Reply
JohnT_Intel
Employee
59 Views

Hi,

 

May I know if the issue is also happening in simulation? Could you share with me the OpenCL code so that I can take a look on the issue?

Reply