ADC module in FPGA DE1-SoC

[JesusAngelG]

Hello, I am looking to test the ADC module of the DE1-SoC card. In the device manuals on the CD ROM there are some examples of how to use this peripheral, however, they use IPs (QSYS) to use the ADC. Is there any example of how to configure this ADC module without the need to use IPs (preferably using VHDL)

Thanks

Regards

[AqidAyman_Intel]

Hello,

I am not aware if we have the design example that demonstrate the use of ADC by using other than IP.

May I know why you do not the IP to implement ADC in the board?

Regards,

Aqid

[JesusAngelG]

Hello,

The main reason I want to configure this ADC module without the need to use IPs (preferably using VHDL) is to avoid copyright issues when using IP blocks in my implementations.

Regards

[sstrell]

As long as you have a Quartus license, you can use any included IP in your design.  Any IP that requires additional licensing will let you know when you compile the design.

The whole point of IP is to simplify the design process.  There'd be no reason to use it if you couldn't use it into production of your design.

And IP is required to implement certain hardware features like the ADC.

[AqidAyman_Intel]

Thank you for the input provided.

I wish to follow up, do you have any more questions?