All the documentation assumes you'll want to connect it to an external PHY interface, but there are no notes about the logistics of connecting to external MAC interface. I'm currently trying to interface a Cyclone V with a KSZ9897 RGMII MAC interface port, but the Cyclone V is failing to receive data on the RX side.
It is a custom board -- I have the single-ended RGMII I/Os routed to a KSZ9897R switch IC, specifically port 7 of the switch, which is a MAC interface port.
Thanks for the link, although I've seen and reviewed this example before. The FPGA IP's that are used ("HPS EMAC Interface Splitter Core" which feeds into the "GMII to RGMII Adapter Core" IP) actually only output differential PHY RGMII signals, so it's not something I can use in my design's MAC to MAC configuration.
I try to consult my team member.
Are you using the rgmii ethernet from the HPS dedicated IO's or from the FPGA IO's. with HPS ethernet FPGA IO you need to use the gmii to rgmii convertor.
Can refer to this document:
My apologies -- I was actually confused earlier about how this example outputted it's signals (for some reason I thought it would output them as A/B/C/D differential pairs, but it clearly does not) -- I think you're right that this is applicable to what I'm doing and I'm currently trying to implement it.
I think my issue might have to do with timing, but with this HPS-to-FPGA setup I can play with delays on the rx and/or tx clock lines and maybe get it to work.
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