FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

DE0-Nano LED D4

Altera_Forum
Honored Contributor II
1,152 Views

Hi, 

 

I am trying to find out how is the LED D4 (with silk screen LOAD) being connected to the FPGA. I have went through the schematic and the manual but is not able to find this information. My guess is the CONF_DONE pin of the Cyclone IV but need a confirmation. 

 

Thanks.
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Altera_Forum
Honored Contributor II
440 Views

It is going to MAX II of USB Blaster. 

 

USB Blaster is not in DE0-Nano schematics.
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Altera_Forum
Honored Contributor II
440 Views

Thanks for the information.

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