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Dear Sirs,
I did several tests using the de10-lite including using the files that come with the board. As I have no experience, I could not find out if the card is having problems or if I really am not able to describe the hardware correctly. Please, if someone can, send me a simple code that makes the writing and reading of a simple data in the SDRAM memory that exists on the board in verilog so that I can test its operation.
Sorry for my english !
Thanks, a lot for your help,
Marco
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Hello Marco,
You need to check that your RTL code is correct before you solve the timing violation.
Any changes made to the RTL code could definitely affect the timing performance due to different routing.
Also, if you require help on timing, please post a new thread as this thread has a different root cause & solution.
Thank you,
Regards,
Nurina
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Hello Marco,
You need to check that your RTL code is correct before you solve the timing violation.
Any changes made to the RTL code could definitely affect the timing performance due to different routing.
Also, if you require help on timing, please post a new thread as this thread has a different root cause & solution.
Thank you,
Regards,
Nurina
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Hello Marco,
I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, please login to https://supporttickets.intel.com , view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution, give Kudos and rate 4/5 survey
Regards,
Nurina
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