Does LVDS receiver clock pin need termination?

[Jiayi_H_Intel]

10M50DAF

Does LVDS receiver clock pin need termination?

[YuanLi_S_Intel]

Not really needed. However, you might need to notice the I/O pin placement rules to avoid creating jitter to LVDS

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_gpio.pdf (Page 31)

[akali17]

A few drivers may require an arrangement 25  resistor. On the off chance that the SSTL/HSTL input is being driven by another Si533x gadget, the 25  arrangement resistor isn't required as this is coordinated on-chip. The most extreme suggested input recurrence right now 350 MHz.

Lucky Patcher Kodi nox

[Jiayi_H_Intel]

Thank you for replying. Could you help explain what is ​arrangement resistor?

[YuanLi_S_Intel]

Hi Jiayi,

May i know where did you get this suggestion?

[Jiayi_H_Intel]

it just comes from SPEC saying that Rx need 100 ohm termination. I know that's refer to rx data. So I wonder if rx clock have any restriction. ​

[YuanLi_S_Intel]

Hi Jiayi,

If it is LVDS, it doesnt matter whether you are using it as clock or digital pin. You will need to put RX 100 Ohm Termination as long as you are using LVDS.

Thank You