FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
5953 Discussions

Error In IP instantation

mupparthivenkatesh
Beginner
‎02-01-2021 08:32 PM
388 Views
hi * Error: (vsim-3033) C:/altera/13.0sp1/Projects/example1/core_generator.v(99): Instantiation of 'altpll' failed. The design unit was not found. # # Region: /core_generator # Searched libraries: # C:/altera/13.0sp1/Projects/example1/simulation/modelsim/rtl_wor when i am using ip core design. I am getting this issue
0 Kudos

Link Copied

1 Reply
sstrell
Honored Contributor III
‎02-02-2021 08:59 PM
371 Views

There's something wrong with the PLL instantiation.  Go through the parameter editor again (called the Megawizard for that old version of Quartus) to regenerate the IP files and verify your PLL instantiation in the .v file mentioned.  Make sure the IP file(s) (probably just the .qip file) is added to the project (Project menu -> Add/Remove files).

0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.