Using the C10 CVP sample project I added the Serial Flash Loader IP to the design into the top_hw.v.
I setup the jtag chain for the Cyclon 10 GX Dev. Kit, download the 10 design (sof) -> ok and download of the jic file starts -> error Flash Loader IP not loaded on device 3. AS is enabled (S1.x default). Unlike with other designs detecting of the jtag chain does not show the epcql1024. The cyclon 10 design is loaded with the right jtag usercode, as a try.
I think your own design does not have the SFL design which is needed to program the flash. When you attach the jic file to the Cyclone 10 GX, you shouldn't modify the file but use the factory default program to program into the FPGA so that the SFL is loaded.
Thank you for your prompt answer. I tried to download as proposed and I am afraid it did not work. See screenshot below. A very worring thing is the readme file in the factory_recovery folder, containing the following sentence: "Note: .jic file cannot be programmed via Quartus Prime Programmer at this moment, will be fixed later in v18.0 or later build." Is this working indeed now?
I seem to miss something. Obviously I took the c10gx_sss.sof file found in the build_factory_source folder. What you are telling me is this is not the right image to take? How to choose the "right" design to do so?
I was able to download the jic to the device. Thank you for this.
Correct me if I am wrong: if I includ the flash loader ip into my design, after power up the programmer should recognize the epcql1024 when scanning the chain?