FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
5921 Discussions

How much sampling rate in ADA demo?

Altera_Forum
Honored Contributor II
921 Views

Hi guy 

I use THDB_ADA from terasic. I used signal trap for trap adc signal from ADA kit. There is demo from terasic that name "stp1.stp". It's ok but i want to know how much sampling rate? 

Thank
0 Kudos
0 Replies
Reply