FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

JTAG PULL UP/DOWN RESISITER

MartinMaa
新手
2,302 次查看

Hi, I am writing to ask a question about the pull-up and pull-down resistors used in JTAG signals.

If an FPGA has internal pull-up resistors, do I need to add these resistors? If I do need to add these resistors, do they need to be placed close to the programming port, or is there no such requirement?

I would appreciate any information you can provide on this topic.

Thank you for your time and consideration.

MartinMaa_0-1711360321094.png

 

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1 解答
NurAiman_M_Intel
2,187 次查看

Hi,


Yes, FvM is correct. Diodes and capacitor are more critical. The position of the resistor in your design should be fine.


Regards,

Aiman


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NurAiman_M_Intel
2,243 次查看

Hi,


It is recommended to follow the setup in the userguide. For the resistor, it should be put close to FPGA.


Regards,

Aiman


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MartinMaa
新手
2,220 次查看

Thank you for your reply.

Since my PCB is very small, only 36mmX36mm, there are some difficulties in placing the components.

If the distance is as shown in the figure, will there be a problem? Or is there a maximum allowable length?

 

MartinMaa_0-1711604699077.png

482mil (12mm)

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FvM
名誉分销商 II
2,206 次查看
Regarding resistors, I doubt there's a strict close to FPGA requirement because resistance is large multiple of trace impedance. Position of capacitors is more critical, a few centimeters don't matter though.
NurAiman_M_Intel
2,188 次查看

Hi,


Yes, FvM is correct. Diodes and capacitor are more critical. The position of the resistor in your design should be fine.


Regards,

Aiman


NurAiman_M_Intel
2,102 次查看

We do not receive any response from you to the previous answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you


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